An efficient PMOS-based LDO design for large loads
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A stable low dropout (LDO) voltage regulator topology is presented in this paper. LDOs (Low Drop-Outs) are linear voltage regulators that do not produce ripples in the DC voltage. Despite the close proximity of the supply input voltage to the output, this regulator will maintain the desired output voltage. Based on a detailed comparison between NMOS and PMOS-based LDOs, we decided to opt for a PMOS design because it does not require an additional charge pump as compared to NMOS. A demonstration of how Miller capacitance enhances overall design stability is also presented here. Multiple pass elements are arranged in parallel in order to increase the current carrying capacity of the pass network.
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