Area Efficient Modular Reduction in Hardware for Arbitrary Static Moduli

08/29/2023
by   Robin Müller, et al.
0

Modular reduction is a crucial operation in many post-quantum cryptographic schemes, including the Kyber key exchange method or Dilithium signature scheme. However, it can be computationally expensive and pose a performance bottleneck in hardware implementations. To address this issue, we propose a novel approach for computing modular reduction efficiently in hardware for arbitrary static moduli. Unlike other commonly used methods such as Barrett or Montgomery reduction, the method does not require any multiplications. It is not dependent on properties of any particular choice of modulus for good performance and low area consumption. Its major strength lies in its low area consumption, which was reduced by 60 implementations for Kyber and Dilithium. Additionally, it is well suited for parallelization and pipelining and scales linearly in hardware resource consumption with increasing operation width. All operations can be performed in the bit-width of the modulus, rather than the size of the number being reduced. This shortens carry chains and allows for faster clocking. Moreover, our method can be executed in constant time, which is essential for cryptography applications where timing attacks can be used to obtain information about the secret key.

READ FULL TEXT
research
03/12/2023

Protecting Quantum Procrastinators with Signature Lifting: A Case Study in Cryptocurrencies

Current solutions to quantum vulnerabilities of widely used cryptographi...
research
12/04/2021

Efficient FPGA-based ECDSA Verification Engine for Permissioned Blockchains

As enterprises embrace blockchain technology, many real-world applicatio...
research
06/04/2020

Design and Hardware Implementation of a Separable Image Steganographic Scheme Using Public-key Cryptosystem

In this paper, a novel and efficient hardware implementation of steganog...
research
03/01/2023

BP-NTT: Fast and Compact in-SRAM Number Theoretic Transform with Bit-Parallel Modular Multiplication

Number Theoretic Transform (NTT) is an essential mathematical tool for c...
research
03/13/2022

Fuzzing+Hardware Performance Counters-Based Detection of Algorithm Subversion Attacks on Post-Quantum Signature Schemes

NIST is standardizing Post Quantum Cryptography (PQC) algorithms that ar...
research
09/30/2020

An Embedded RISC-V Core with Fast Modular Multiplication

One of the biggest concerns in IoT is privacy and security. Encryption a...
research
10/01/2019

Stealthy Opaque Predicates in Hardware – Obfuscating Constant Expressions at Negligible Overhead

Opaque predicates are a well-established fundamental building block for ...

Please sign up or login with your details

Forgot password? Click here to reset