Performance Limit and Code Design for Resistive Random-Access Memory Channels
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Resistive random-access memory (ReRAM) is a promising candidate for the next generation non-volatile memory technology due to its simple read-write operation and high storage density. However, its crossbar array structure causes a server interference effect known as the "sneak path." In this paper, we address the sneak-path problem based on communication theory and coding theory, and design error correction codes (ECCs) that can combat both the sneak-path interference and the channel noise. The main challenge of the code design for an ReRAM channel is that the channel is highly data-dependent and correlated, and hence the conventional error correction coding scheme will not be effective. We propose a distributed data storage strategy, which assigns a codeword to multiple independent arrays, and exploit a real-time channel estimation mechanism to investigate the instant channel status of the ReRAM channel. Since the coded bits from different arrays experience independent channels, a "diversity" gain can be obtained during decoding, and when the codeword is adequately distributed, the code actually performs the same as that over an uncorrelated and data-independent channel. By applying decoding based on the scheme of treating-interference-as-noise (TIN), the ReRAM channel is equivalent to a block-varying channel, for which we propose both the capacity limit and code design. The proposed code design is based on the state-of-the-art sparse-graph coding and decoding theories, which enables the ReRAM system to achieve the maximum storage efficiency with a gap of less than 0.1 bit/cell from the capacity limit of the ReRAM channel.
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