Two New CNTFET Quaternary Full Adders for Carry-Propagate Adders
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In Carry Propagate Adders, carry propagation is the critical delay. For the 1-digit adders that they use, the most efficient scheme is to generate two intermediate carries: C_out0 (C_in=0) and C_out1(C_in=1). Then multiplex them to produce the correct output according to C_in. For any radix, the carry output has always a logical value 0 or 1. We show that using 0 and V_dd levels for input and output carries instead of 0 and V_dd/3 in quaternary full adders significantly reduce the carry propagation. We compare such a quaternary full adder with binary full adders to implement N-digit carry propagate adders.
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