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02/17/2023
VEGETA: Vertically-Integrated Extensions for Sparse/Dense GEMM Tile Acceleration on CPUs
Deep Learning (DL) acceleration support in CPUs has recently gained a lo...
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10/05/2021
RASA: Efficient Register-Aware Systolic Array Matrix Engine for CPU
As AI-based applications become pervasive, CPU vendors are starting to i...
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09/15/2021
Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators
To meet the extreme compute demands for deep learning across commercial ...
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06/19/2021
Evaluating Spatial Accelerator Architectures with Tiled Matrix-Matrix Multiplication
There is a growing interest in custom spatial accelerators for machine l...
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03/18/2021
Extending Sparse Tensor Accelerators to Support Multiple Compression Formats
Sparsity, which occurs in both scientific applications and Deep Learning...
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09/04/2020
