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09/18/2023
Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency
The ever-increasing computational and storage requirements of modern app...
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07/31/2023
PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge
Emerging deep neural network (DNN) applications require high-performance...
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05/15/2023
FlooNoC: A Multi-Tbps Wide NoC for Heterogeneous AXI4 Traffic
Meeting the staggering bandwidth requirements of today's applications ch...
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03/30/2023
MemPool: A Scalable Manycore Architecture with a Low-Latency Shared L1 Memory
Shared L1 memory clusters are a common architectural pattern (e.g., in G...
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02/12/2023
Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference
In this paper, we present Quark, an integer RISC-V vector processor spec...
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11/25/2022
HexaMesh: Scaling to Hundreds of Chiplets with an Optimized Chiplet Arrangement
2.5D integration is an important technique to tackle the growing cost of...
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11/25/2022
Sparse Hamming Graph: A Customizable Network-on-Chip Topology
Chips with hundreds to thousands of cores require scalable networks-on-c...
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10/17/2022
A ”New Ara” for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design
Vector architectures are gaining traction for highly efficient processin...
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09/02/2022
Soft Tiles: Capturing Physical Implementation Flexibility for Tightly-Coupled Parallel Processing Clusters
Modern high-performance computing architectures (Multicore, GPU, Manycor...
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07/16/2022
Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters
While parallel architectures based on clusters of Processing Elements (P...
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12/02/2021
MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration
Three-dimensional integrated circuits promise power, performance, and fo...
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12/05/2020
MemPool: A Shared-L1 Memory Many-Core Cluster with a Low-Latency Interconnect
A key challenge in scaling shared-L1 multi-core clusters towards many-co...
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09/11/2020
An Open-Source Platform for High-Performance Non-Coherent On-Chip Communication
On-chip communication infrastructure is a central component of modern sy...
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06/02/2019
