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09/17/2023
Dynasor: A Dynamic Memory Layout for Accelerating Sparse MTTKRP for Tensor Decomposition on Multi-core CPU
Sparse Matricized Tensor Times Khatri-Rao Product (spMTTKRP) is the most...
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08/04/2023
Exploiting On-chip Heterogeneity of Versal Architecture for GNN Inference Acceleration
Graph Neural Networks (GNNs) have revolutionized many Machine Learning (...
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05/11/2023
Graph Neural Network for Accurate and Low-complexity SAR ATR
Synthetic Aperture Radar (SAR) Automatic Target Recognition (ATR) is the...
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08/22/2022
Performance Modeling Sparse MTTKRP Using Optical Static Random Access Memory on FPGA
Electrical static random memory (E-SRAM) is the current standard for int...
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07/17/2022
Towards Programmable Memory Controller for Tensor Decomposition
Tensor decomposition has become an essential tool in many data science a...
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09/18/2021
Reconfigurable Low-latency Memory System for Sparse Matricized Tensor Times Khatri-Rao Product on FPGA
Tensor decomposition has become an essential tool in many applications i...
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08/21/2021
Programmable FPGA-based Memory Controller
Even with generational improvements in DRAM technology, memory access la...
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08/21/2021
Reconfigurable co-processor architecture with limited numerical precision to accelerate deep convolutional neural networks
Convolutional Neural Networks (CNNs) are widely used in deep learning ap...
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08/07/2021
A High Throughput Parallel Hash Table on FPGA using XOR-based Memory
Hash table is a fundamental data structure for quick search and retrieva...
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10/30/2019